Product how-to: DSP/FPGA platform for video surveillance

Surveillance applications are constantly evolving, adding new features like analytics, image stabilization, image recognition, motion estimation, and target tracking. The features demand improved system performance and capabilities. At the same time, the push to lower system cost and improve time-to-market design cycles presents opposing challenges. Add to this the ever changing landscape of silicon, software, and development tools, and you are left with a complex set of design trade-offs.

Today, DSP vendors offer several low-cost processors optimized for video. Texas Instruments' DM643x family of DaVinci processors is one example. For some applications, these DSPs offer all the performance you need. When you need more performance, Field Programmable Gate Array (FPGA) are a good option. For example, Xilinx' latest Virtex-5 SX240T FPGA claims over 528 GMACs (billions of multiply-and-accumulate operations per second) and 190+ GFLOPS(billions of single-precision, floating-point operations per second). Unfortunately, FPGAs by themselves are not always the perfect fit either. Instead, it is often better to use the FPGA as a coprocessor for a DSP. When put together, the DSP and FPGA can offer the best of both worlds by increasing performance and reducing overall cost.

Avnet Electronics Marketing recently introduced a co-processing platform tailored to video surveillance and image processing applications. The platform combines the low-cost DM6437 DaVinci DSP from Texas Instruments with the low-cost Spartan-3A DSP FPGA from Xilinx. The integration of these two devices onto a single development platform helps designers explore the concept of co-processing solutions. To further aid development, Avnet supports the platform with a board support package and several reference designs. This article provides an overview of the co-processing platform, explains some of the tools and libraries available to support application development, and highlights where the DSP plus FPGA solution makes sense.

The Avnet Co-Processing Platform
Let's start with a quick overview of the Avnet co-processing platform. Figure 1 shows a block diagram of the complete system. The board provides two processing sub-systems, one based around the DM6437 TI DSP and the other centered on the Spartan-3A DSP Xilinx FPGA. Each can function independently and perform some level of video processing by itself.

(Click to enlarge)

On the FPGA side of the board, a standard EXP expansion slot allows for the addition of a video sub-system add-on card. Figure 2 shows one such card, the Avnet PS Video EXP module. This card provides various DVI, component and composite video input and output interfaces. It also provides an LVDS-based LCD panel connection to the FPGA via the EXP connector. An image sensor interface is also included on the baseboard for connection of camera devices to the Spartan-3A DSP FPGA.

(Click to enlarge)

The DM6437 side includes its own component and composite video output, as well as audio input and output capabilities. As a video-centric DSP system, the DM6437 includes considerably more built-in video functionality than the FPGA, and is thus more capable by itself. For example, the DSP includes an on-chip CCD controller, four video DACs, a video encoder, a resizer, and on-screen display hardware. On the software side, the DM6437 can take advantage of the strong TI developer community for off-the-shelf codecs, coding tools, and video specific applications.

The architecture of the FPGA and DSP interface can be a critical factor when it comes to passing data between the two, so it's worth taking some time to explain how Avnet chose to implement this part of the design. There are five basic interfaces between the DSP and FPGA:

• An I2C port. The 2-wire I2C interface is ideal for passing low bandwidth command and control data, reaching a maximum 400 Kbps raw throughput rate.
• An asynchronous External Memory Interface (EMIF). The 8-bit wide asynchronous EMIF interface provides the DSP easy access to memory mapped registers and peripheral functions that may reside in the custom FPGA design.
• VLYNQ. The high-speed, point-to-point, serial VLYNQ interface offers the DSP a full duplex, packet-based transfer protocol for memory mapped access to the FPGA. VLYNQ uses four LVDS pairs for both transmit and receive functions between the DSP and FPGA, for an approximate 40 MB per second throughput after the 8b/10b coding overhead.
• Video Processing Front End (VPFE), and Video Processing Back End (VPBE). The Video Processing Sub-System (VPSS) embedded in the DaVinci includes the VPFE and VPBE ports. For high bandwidth data passing from the FPGA to the DSP, the VPFE provides an 8/16-bit interface running at up to 75 MHz, supporting the BT.656 standard format. From the DSP to the FPGA, the VPBE provides a 24-bit parallel RGB interface also running at up to 75 MHz. Both the VPFE and VPBE are ideal interfaces for passing digital video data between the DM6437 and the Spartan-3A DSP.

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