Electromagnetic interference (EMI) is energy that adversely affects the
performance of electrical/electronic equipment by creating undesirable
responses or complete operational failure.
EMI is caused either by
radiated electromagnetic fields or conducted voltages and currents.
High clock frequencies and short-edge rates in present high-speed
digital systems result in EMI problems.
An important source of both conducted and radiated EMI is electrical
equipment coupled to AC electrical lines such as computers, switching
power supplies, and electrical devices which utilize electrical motors,
such as refrigerators, air conditioners, and treadmills.
Once EMI from an electrical device is conducted into an electrical
wiring circuit, the wiring may act as an antenna and "broadcast" the
conducted EMI as RFI (radio frequency interference)
throughout a structure.
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| Figure
1. Hershey Kiss Spread Spectrum Clock Frequency Profile in Time Domain |
The effects of EMI can range from minor nuisances to catastrophic
failures and so it is important to effectively control EMI. Electromagnetic Compatibility (EMC)
is the ability of the systems to operate within their intended
environment without conducting or radiating excessive amounts of
electromagnetic energy.
EMI Standards and Associated Cost
EMC standards are designed to ensure that items of electronic equipment
do not cause problems to each others operation or, even worse, give
rise to equipment malfunctions.
Regulatory requirements regarding EMI shielding for consumer
electronics applications " including televisions, radios, portable
entertainment, electronic games, and Internet appliances " varies from
country to country.
EMI Specifications have been issued by various organizations. In the
United States, the FCC has issued Part 15, sub-part J, for Class A and
B devices. Class A and level A describe industrial equipment, while
Class B and level B are applicable to consumer equipment. EMI rules
reduce interference between electronic devices and address health and
safety concerns.
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| Figure
2. Spread Spectrum Clock Frequency Profile in Frequency Domain |
The typical factors considered in the EMI control plan are:
1) PCB
Layout " Segregation of Sensitive components, Power
& Ground Planes
2) Circuit
current " Emissions increase linearly with current
3) Frequency,
including slew rates
" Emissions increase Square of the Frequency
4) Bandwidth
5) Circuit loop area " To be
Held to Minimum
6) Shielding
/ Filtering " A combination of proper design, filtering
and shielding, and other techniques to achieve the required levels of
emissions in the most economical way
7) Spread
Spectrum Clock " appropriate spread amount and modulation
frequency
8) The ability to dither the
center frequency of clocks used in an application system in order to
spread radiated emission energy over a band of frequencies rather than
having all the energy emitted at one frequency.
EMI Control & Reduction
Techniques
There are two fundamental methods of EMI control and reduction:
Suppression and Absorption. The most common methods of noise reduction
include proper equipment circuit design, shielding, grounding,
filtering, isolation, separation and orientation, circuit impedance
level control, cable design, and noise cancellation techniques.
These methods require the use of passive and active components such
as filters, chokes, ferrite beads, sheets and foils, shielding along
with various PCB layout rules, and Spread Spectrum Clock Generators (SSCG).
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| Figure
3. Hershey Kiss Spread Profile Advantage |
Attacking EMI Problems at the Source
A fundamental EMC design principle requires that EMI be attenuated at
its source on the PCB. Spread-spectrum techniques are methods by which
energy generated in a particular bandwidth is deliberately spread in
the frequency domain, resulting in a signal with a wider bandwidth. A
spread spectrum clock generator (SSCG) performs this spreading for
designers.
When selecting a spread spectrum clock to attenuate EMI for a
consumer product, developers must ensure:
1) The system still passes EMI regulation
tests. Good
frequency profile and modulation frequency are most important. A
high-quality Hershey Kiss frequency profile gives the best performance
in EMI reduction; a triangle frequency profile requires a larger spread
amount to achieve the same EMI reduction (Figure 1 to Figure 3 above). Higher modulation frequency
usually offers higher EMI attenuation (Figure
4 below).
2) System performance is maintained even with
spreading side effects. First, the PLL must run at an
optimum state, e.g. high PFD and VCO frequency, appropriate bandwidth,
etc. Second, the frequency spread amount usually should be as small as
possible to keep system timing margin high and cycle-cycle jitter low.
For down spread, a lower spread amount makes a system run less slow by
not reducing too much on average frequency.
3) Minimal impact on overall system cost.
Spread spectrum clock chip price is traditionally a major price factor
in consumer electronics applications. However, as the complexity of
consumer systems has goes up dramatically in recent years, development
cost and risk have to be seriously considered as well.
For example, if even one requirement is not met, no matter if it is
EMI or jitter performance, applications are more likely to require a
modification to the system clock. The flexibility an of a programmable
EMI approach offers insurance by reducing potential development cost
and risk.
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| Figure
4. Attenuation Optimization with Modulation Frequency |
Spread Spectrum Clock Generators
Spread Spectrum Clock Generators (SSCG) can be categorized into
programmable and non-programmable types, as well as by whether they
have a Hershey Kiss and triangular spread frequency profile shape. The
spread spectrum clock requirements for different consumer systems vary
in frequency, center or down spread, spread amount, modulation
frequency, Hershey Kiss or
triangle profile type, etc.
As non-programmable spread spectrum clock chips are customized for
specific applications " offer several fixed selectable options like
frequency ranges and spread amounts " it can be difficult to meet
optimum spread requirements while maximizing cost/performance.
Most fixed function clock chips on the market offer several fixed
selectable input frequency ranges (e.g. 20-40MHz, 40-80MHz and
80-160MHz) and spread percentages (e.g. 0.5%, 1%, 2% and 3%).
Optimization requires two sets of PLL parameters " one set for EMI
reduction performance, another for PLL performance.
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| Figure
5. Frequency Scaling in a GP SSCG Buffer Chip |
Several undesired side effects arise when actual configuration
deviates from these optimized settings. For example, when the input
frequency is not at the center of a selection range, VCO and modulation
frequency is linearly scaled (Figure 6
below).
The frequency profile may be distorted if PLL bandwidth is low (which it usually is for controlling
cycle-cycle jitter, as shown in Figure 6 below), which impairs
EMI performance.
At the low input frequency boundary, the worst happens: because of
the low PFD and VCO frequency, cycle-cycle jitter is significantly
increased, and because of the low modulation frequency and possible
frequency profile distortion, EMI reduction is significantly reduced.
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| Figure
6. Frequency Scaled and Optimized Profiles Comparison |
When spread amount selection is limited, developers will be forced
to select a larger than necessary spread amount. This typically
increases cycle-cycle jitter and reduces the timing budget for the
system.
If none of the spread percentages satisfies the system, developers
must request the clock manufacturer to make design changes and
manufacture a new chip, which at best takes several weeks even for a
simple metal layer change and is often very expensive.
Alternatively, a programmable spread spectrum clock generator
provides general purpose clocks supporting field programmability
combined with on-chip non-volatile memory that enables dynamic
reconfiguration of spread parameters, eliminating slow and expensive
chip design changes.
Programmability also allows optimization for the best spread
spectrum clock performance at desired specifications. For example,
developers can define exact spread amounts like 2.1% (instead of 3% by
selection), or optimize modulation patterns for the desired frequency
setting, etc.
Figure 4 earlier shows how
modulation frequency optimization, using a 4-PLL
clock chip with 2 spread spectrum PLLs can easily provide an
increase of -3 to -4 dB in EMI reduction. Either of the spreading PLLs
has two independent spread pattern selections.
Most developers prefer Hershey Kiss spread clock for better EMI
performance, but many clock companies only offer linear spread clock.
Ideally, an SSCG should offer both Hershey Kiss and linear spread
clocks. Figure 3 shows Hershey Kiss spread increased attenuation by
-1.67dB for one test case with the
4-PLL clock chip shown above.
Moreover, important clock parameters, like PLL charge pump current,
VCO gain, and output drive strength, should be programmable. Such
flexibility greatly improves system performance, reduces system
development time, and allows last minute changes while reducing risk.
Shuliang Li is Sr. Staff Design
Engineer, and Narayan Purohit is Director of Marketing, at Cypress Semiconductor.
